Cerebras Turns Up the Power on Its CS-4 Inference Rack

Cerebras has unveiled the CS-4, a rack-scale system for running AI models that puts three WSE-3 Turbo wafer-scale processors in one rack. The company claims it can deliver 30 times more tokens per second per user than GPUs, framing rapid model responses—not training—as the contest it wants to win.

The CS-4 is Cerebras’s fourth-generation rack-scale system, but it retains the 5nm WSE-3 wafer-scale engine used in CS-3. Rather than introduce new silicon, the company is seeking roughly twice CS-3 performance through higher wafer clock speeds, stronger power delivery, added cooling capacity and greater rack density.

More compute per rack, with a larger power envelope

The physical change is central. A CS-4 rack holds three modular wafer-scale-engine backpacks, up from two wafers in a CS-3 rack. SemiAnalysis estimates the new rack’s thermal design power at 125–135 kW, reflecting the higher clocks and the additional engine.

The backpack design separates power, cooling, I/O and wafer modules, allowing the compute unit to be installed into a prepared rack. SemiAnalysis says the simpler assembly could offset some of the added power and cooling hardware, though that cost outcome has not been established.

A speed-focused design meets a memory boundary

Cerebras markets the system at 43 PB/s of total on-chip memory bandwidth. Yet the reuse of WSE-3 also means each wafer retains 44 GB of SRAM, the fast on-chip memory that Cerebras uses instead of relying on conventional DRAM for this workload. More bandwidth can accelerate model execution, but the unchanged capacity limits how much model state can reside on a wafer.

The power trade-off is unresolved. SemiAnalysis expects performance per watt to improve only slightly over CS-3, because the rack’s performance gain comes alongside substantially higher power consumption.

The systems-level response

• CS-4 adds field-upgradeable I/O modules, intended to let Cerebras adopt newer networking standards without redesigning the chassis.
• It supports direct wafer-to-wafer links as well as switched networking, reducing dependence on the rack’s switched network for some connections.
• Cerebras is working with AMD and AWS Trainium on heterogeneous, disaggregated inference configurations, where different hardware can handle different parts of model serving.

The next test is the split workload

That partner strategy addresses the CS-4’s central trade-off. Cerebras’s architecture is optimized for inference, and the company also rents access to its chips through cloud services. But a heterogeneous system divides work across hardware with different capabilities, making the performance case depend on how well a customer’s workload fits that division over time.

Cerebras says each WSE-3 Turbo processor contains 4 trillion transistors and calls it the largest AI semiconductor ever built. The more consequential question for CS-4 buyers is narrower: whether its higher-speed, higher-power rack and its emerging disaggregated configurations can sustain the company’s promised interactive inference advantage on their own models.