Cognichip Launches Chip-Design AI Aimed at Predicting Physical Tradeoffs

Cognichip has launched ACI Enterprise with an ambitious pitch: AI that can anticipate how an early chip-design choice will affect the finished hardware. The company has named customers and described more than 40 engagements, but those figures measure activity, not whether its design predictions are accurate.

A model for consequences, not just code

Cognichip says its “physics-informed” models are trained across design levels, from specifications and RTL—a description of a chip’s logic—through circuits and physical layout. The aim is to assess how early choices may affect speed, power use and chip area later on. That is a different claim from simply generating design code.

ACI Enterprise can work with a customer’s existing electronic design automation tools—the software engineers use to develop and check chips. It can call those tools when needed. Cognichip’s proposed advantage is that its models can explore possibilities without running a conventional tool sequence for every contemplated change. Whether the predictions hold up is the crucial test.

From requirements to a device you can test

The proposed workflow starts with requirements or an existing design that needs revising. ACI can generate RTL and testbenches, then create and run environments that check whether the design behaves as intended. It can track test coverage, identify bugs, investigate their causes and explore tradeoffs among power use, performance and chip area.

The system also supports FPGAs, chips developers can configure after manufacture. Chief product officer Stelios Diamantidis told EE Journal that users could start with written requirements or a whiteboard sketch. He said ACI can select and connect components and custom logic, then program an attached FPGA board for testing. Cognichip is working with Altera to optimize the system for its FPGA ecosystem.

Customers are engaged; results are the harder test

Diamantidis said Cognichip was involved in more than 40 customer engagements, most of them not publicly identified. The company has permission to name Renesas and SiTime as customers for custom chip designs. An engagement shows a team is working with Cognichip; it does not establish how much time ACI saved or how well its design choices performed.