d-Matrix Plans to Connect Its Next AI Chip to NVIDIA’s Rack Architecture

The deal gives d-Matrix a route to deploy specialized inference hardware within NVIDIA-designed systems, rather than building the surrounding rack, networking and cooling stack alone.

By 2 min read
d-Matrix Plans to Connect Its Next AI Chip to NVIDIA’s Rack Architecture
d-Matrix Plans to Connect Its Next AI Chip to NVIDIA’s Rack Architecture

Listen to this story

The audio brief

About 1:44
0:001:44
Read transcript
d-Matrix plans to put its next AI inference chips inside NVIDIA’s rack architecture, giving the company a way to deploy specialized hardware without building the surrounding infrastructure from scratch. Its Raptor accelerators will use NVIDIA’s NVLink Fusion, along with the company’s MGX rack design and Spectrum-X networking. The goal is to solve the less visible parts of a data-center rollout: high-speed connections, rack integration, power, cooling, and supply-chain coordination. In the planned setup, d-Matrix provides the inference processor, while NVIDIA supplies much of the platform around it. That includes NVLink for scale-up connections, Spectrum-X for scale-out networking, and planned integration with Vera CPUs, ConnectX-9 SuperNICs, and BlueField-4 DPUs. Astera Labs is working with d-Matrix on custom connectivity. Raptor systems could run alongside NVIDIA GPU systems, including Vera Rubin NVL72, for what the companies describe as disaggregated inference—separating inference work from the main GPU system when that makes sense. NVIDIA claims sixth-generation NVLink can deliver up to three times lower XPU-to-XPU latency than standard Ethernet, ten times higher packet rates, and three terabytes per second of all-to-all bandwidth per XPU. Those are NVIDIA’s claims, not results from a deployed d-Matrix system. The systems are expected in 2027, according to Yahoo Finance reporting. The key question is whether this shared rack strategy turns Raptor into a practical alternative once real customer deployments begin.

Story brief

3 key points

d-Matrix is positioning its Raptor inference accelerators for 2027 deployments built around NVIDIA’s rack stack rather than a standalone platform. NVIDIA will provide NVLink Fusion, MGX, Spectrum-X, and related CPUs, networking, and DPUs, while Astera Labs supplies custom connectivity. The intended benefit is a faster path to disaggregated inference alongside NVIDIA GPU systems, including Vera Rubin NVL72. However,...

  1. 01

    Raptor systems combine sixth-generation NVLink scale-up, Spectrum-X scale-out, and MGX rack architecture.

  2. 02

    NVIDIA claims up to 3× lower XPU-to-XPU latency, 10× packet rates, and 3 TB/s all-to-all bandwidth per XPU.

  3. 03

    Vera CPUs, ConnectX-9 SuperNICs, and BlueField-4 DPUs are planned integration components.

d-Matrix plans to place its next inference chips inside NVIDIA’s rack-scale infrastructure, pairing a specialized accelerator with NVIDIA networking, rack designs and related hardware. The company has chosen NVIDIA NVLink Fusion for its next-generation Raptor XPUs, a move the companies say is intended to reduce the work and risk of turning custom silicon into a large deployment.

A chipmaker pursuing data-center-scale deployment must also solve for the machines around its processor: high-speed connections, rack design, power, cooling, software and supply-chain integration. NVIDIA says NVLink Fusion is built to let third-party XPU and CPU makers use those surrounding layers instead of developing a complete rack-scale platform from scratch.

The planned Raptor setup combines NVLink scale-up networking with Spectrum-X scale-out networking and NVIDIA’s MGX rack architecture. d-Matrix says the resulting systems can operate alongside NVIDIA GPU systems, including Vera Rubin NVL72, for disaggregated inference.

Demand for inference is soaring, but capital, time and energy remain finite.

Sid Sheth, cofounder and CEO of d-Matrix

The planned NVIDIA components

  • NVLink and MGX form the scale-up interconnect and common rack foundation for Raptor systems.
  • Vera CPUs, ConnectX-9 SuperNICs, BlueField-4 DPUs and Spectrum-X Ethernet are also planned for integration.
  • Astera Labs is working with d-Matrix on custom connectivity solutions for the system.

The arrangement is notable because NVIDIA is offering the infrastructure beneath the accelerator to another chipmaker. NVIDIA describes NVLink Fusion as support for custom third-party XPUs and CPUs within its rack-scale platform. The company lists d-Matrix among an ecosystem that includes AWS, Arm, Intel, Fujitsu, SiFive, Marvell, MediaTek, Samsung, Cadence, Synopsys, Ayar Labs and Lightmatter.

NVIDIA says sixth-generation NVLink can provide up to three times lower XPU-to-XPU latency than off-the-shelf Ethernet, 10 times higher packet rates and 3 TB/s of all-to-all bandwidth per XPU. Those are NVIDIA performance claims, not results from a deployed d-Matrix system. Systems pairing Raptor processors with NVIDIA’s rack-scale technology are expected to be available in 2027, according to reporting carried by Yahoo Finance.

The announcement does not establish how Raptor systems will perform in customer data centers or whether the promised deployment advantages will materialize. It does clarify the intended division of labor: d-Matrix supplies its inference accelerator, while NVIDIA supplies the interconnect and rack framework. For buyers, the appeal is the possibility of choosing specialized compute without adopting an entirely separate physical infrastructure.

Sources

  1. blogs.nvidia.comd-Matrix Adopts NVIDIA NVLink Fusion for Rack-Scale XPU Deployment
  2. finance.yahoo.comNvidia Is Letting Rival AI Chips Into Its Racks. Astera Labs Could Be the Quiet Winner

Loading discussion...