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TPU 8tx and TPU 8i Max reuse existing processors in specialized configurations. Google’s approach changes the systems around the chips, rather than waiting for new silicon.
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Google’s November 9, 2026 additions extend its eighth-generation TPU lineup through system-level changes rather than a new processor generation. TPU 8tx is positioned for confidential computing on sensitive workloads, while TPU 8i Max combines two 8i chips to increase compute and memory capacity for large-context tasks. The move lets Google tailor the same chip generation to enterprise security and memory bottlenecks; stated performance and protection benefits are company claims.
Google claims TPU 8i Max doubles compute and SRAM versus TPU 8i, and doubles high-bandwidth memory bandwidth.
TPU 8i Max fits twice the silicon into the existing rack footprint, increasing computing capacity without requiring more floor space.
TPU 8tx uses TPU 8t silicon, fifth-generation AMD EPYC processors and Google’s Boardfly network to protect data and model weights during processing.
Google introduced two AI computing systems on November 9, 2026, aimed at different obstacles to running demanding models: sensitive data and memory limits. TPU 8tx targets confidential processing, while TPU 8i Max packs more computing power into an existing rack footprint. Both extend Google’s eighth-generation Tensor Processing Unit family using existing chips, not a new chip generation.
The additions join TPU 8t, designed for large-scale model training, and TPU 8i, built for real-time reasoning. Google introduced those systems at Cloud Next in April. The new configurations give the same generation more specialized roles, rather than replacing its earlier members. Google says this is the first time it has introduced four TPU systems in one year.
TPU 8i Max addresses what Google calls the memory wall: a workload can stall when processors cannot get the data they need quickly enough. The company points to groups of AI agents working across an entire software codebase or hours of video. Those tasks put pressure on memory bandwidth—the rate at which data can move to the processors.
Google’s solution combines two TPU 8i chips on a single package, increasing computing capacity and memory resources together. The system targets very large context windows, the information a model can consider while producing an answer. Google says the design fits twice the silicon into the existing rack footprint, allowing data centers to put more computing power into the same floor space.
TPU 8tx tackles a different problem. Data is normally encrypted while stored or traveling over a network, but must be unlocked in memory for a computer to process it. Google says 8tx adds hardware-level protection that keeps sensitive data and model weights—the values that define a trained model—protected and isolated during active use.
The intended customers are regulated enterprises and governments running advanced or proprietary models alongside sensitive information. The system uses the same silicon as TPU 8t, paired with fifth-generation AMD EPYC processors. It also adopts Google’s Boardfly network, originally designed for real-time reasoning, to reduce delays as agents move through multiple steps.
Combining training-oriented computing with an inference network—the connections used when running models—also lets organizations run and customize models on one system, Google says. Its proposed uses include:
The company says teams can perform those tasks without moving sensitive data between separate computing clusters. That makes keeping the work together part of the system’s security proposition, alongside protection during processing.
Google explicitly distinguishes these releases from designing a new processor. A chip requires a multiyear design and manufacturing process. A system changes how computing, networking and storage fit around that chip, including its packaging. Google says its modular architecture lets engineers adjust memory, networking and security to deliver specialized systems in months rather than years.
External demand is helping shape those choices. Google says its nearly 100 TPU customers include frontier AI labs, trading firms, retailers and universities. It attributes the new configurations to requests for accelerators that can handle very large model contexts and specialized encryption for regulated workloads. The announcement therefore extends the family around specific customer constraints, rather than presenting one replacement system for every task.
Story updates
Google’s newest confidential AI system puts AMD processors at the center of protecting sensitive workloads. On November 9, 2026, the companies announced that Google Cloud TPU 8tx pairs Google’s AI accelerators with fifth-generation AMD EPYC host processors. The companies describe it as the first cloud TPU system with hardware-enforced confidential computing.
Google is targeting regulated enterprises and governments that want to run proprietary or frontier models and autonomous agents alongside sensitive data. Confidential computing addresses the period when that information is being processed: Google says TPU 8tx keeps data and model weights protected and isolated while they are in active use, not just while stored or sent over a network.
The EPYC processors perform the host work around Google’s Tensor Processing Units, or TPUs. They prepare data, coordinate workloads and manage high-throughput communication with the accelerators. AMD’s contribution also includes its Infinity Guard security capabilities and compatibility with x86 software. The collaboration combines those host capabilities with Google’s specialized AI processing rather than replacing the TPU with an AMD accelerator.
AMD says the system uses Secure Encrypted Virtualization, or SEV, a set of security capabilities in the EPYC CPU. Working with the TPU, those capabilities extend confidential-computing protection beyond the central processor to connected accelerators. That makes the connection between the host and accelerator part of the security design, alongside the protection provided within each part of the system.
Before an accelerator receives direct access to protected memory, the architecture verifies its identity and security configuration. According to AMD, the protections help keep customer prompts, model weights and intermediate data encrypted in CPU memory and during transfers between the host and accelerators. During accelerator execution, the system uses hardware isolation—a distinct protection from the encryption used in memory and transit.
TPU 8tx is a new system configuration, not a new underlying chip. Google says it uses the same silicon as TPU 8t, paired with AMD’s hosts and the low-latency Boardfly network developed for real-time reasoning. The configuration is optimized for confidential inference, while also supporting small-scale training. Google describes the combination as training-grade compute connected through a fast inference network.
That combination is intended to let organizations run and customize models on a single system. Google identifies three kinds of customization that TPU 8tx can support:
Fine-tuning models using private data, allowing teams to customize a model within the system designed to protect their sensitive information.
Distilling large models into smaller ones, another supported customization task alongside running the models.
Training agents through reinforcement learning, so organizations can use the same system for agent execution and further training.
Google says keeping those jobs together removes the need to migrate sensitive data between separate clusters for the supported tasks. The operational proposition is therefore broader than protecting a model’s responses: organizations can also work on the model using their private information without moving that information to a separate computing environment for each stage.
Speed remains part of the pitch. Google says the Boardfly network helps keep multi-step agents moving and delivers “up to 2x lower latency” compared with TPU 8t. That is Google’s stated comparison, not an independently verified result. Its reference point is TPU 8t, rather than a competing accelerator or an earlier AMD-hosted system.
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