Intel details its AI inference GPU, with customer sampling still underway
The OCP Summit presentation pairs an air-cooled accelerator with Xeon racks and shared software. Its largest memory configuration belongs to partner-built cards, not Intel’s own.
Intel's D-series inference GPU is still in customer sampling, with no general-availability date, so its newly detailed specifications remain a product pitch rather than a shipping option. The PCIe, air-cooled design aims to fit existing data centers, while Xeon racks handle agent orchestration, data movement and tool execution; Intel is framing concurrent agents at a target latency as a better measure of infrastructure than accelerator throughput alone. Buyers should distinguish Intel's 160GB card from partner designs that can reach 480GB.
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Intel lists up to 1.5TB/s of memory bandwidth and 1.3 petaflops of FP8 compute within a 350-watt envelope for D-series.
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Intel claims D-series can support models up to 300 billion parameters on one card and more than one trillion across eight GPUs, without specifying the card configuration or response speed.
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Select Xeon 6+ rack designs exceed 46,000 CPU cores at 133.45 kilowatts of total rack power, according to Intel.
Intel gave customers a clearer picture of its next AI inference accelerator on October 12, pairing new GPU specifications with CPU rack designs for the work surrounding AI models. At the Open Compute Project Global Summit, the company described a system spanning both jobs—but its GPU D-series remains in customer sampling, without an announced general-availability date.
The presentation centers on matching different tasks to different processors. GPU D-series targets inference: running AI models to produce responses. Xeon CPUs handle the surrounding workflow, including coordinating tasks, executing tools and moving data. Intel’s argument is that serving an agent requires more than accelerating the model alone.
Two memory capacities, depending on who builds the card
GPU D-series, previously code-named Crescent Island, uses Intel’s Xe3P architecture. It is designed for sustained, memory-intensive inference, including large language models, long-context workloads and services handling multiple inference requests concurrently. Intel identifies multi-tenant AI services, robotics and other latency-sensitive applications as target uses.
Intel describes configurations with up to 480GB of LPDDR5X memory, 1.5TB/s of memory bandwidth and 1.3 petaflops of FP8 compute within a 350-watt power envelope. Those are company-supplied specifications. The memory headline also needs a distinction: Intel-branded cards have 160GB, while the design allows partner-built cards with options reaching 480GB.
The company says D-series supports models with up to 300 billion parameters on one card and more than one trillion parameters across eight GPUs. It presents those figures as capacity claims for the product; the announcement does not tie them to a specific card memory configuration or a stated response speed.
Deployment is another part of the pitch. D-series uses a standard PCIe card format and air cooling. Intel says this allows customers to add inference capacity in existing data centers without specialized racks or cooling infrastructure, rather than requiring a new facility design around the accelerator.
CPUs take on the work between model responses
Alongside the GPU details, Intel showcased new Xeon-based rack designs developed with ecosystem partners. Many use Open Rack v3, an Open Compute Project standard intended to simplify deployment and integration within open data-center infrastructure. These racks address general-purpose computing needs, rather than replacing the accelerator’s model-serving role.
Select Xeon 6+ configurations exceed 46,000 CPU cores per rack at 133.45 kilowatts of total rack power, Intel says. The company links that density to processing data, managing input and output, executing tasks and keeping accelerators supplied with work as agent workflows become more complex.
Intel also proposes a different measure of useful infrastructure performance: how many concurrent agents a rack can sustain at a target latency, or response delay. That framing puts CPU execution and data movement alongside model generation, instead of treating accelerator compute capacity as the only measure that matters.
Shared software, with GPU extensions still ahead
The software plan is meant to connect those computing roles without forcing developers into separate tools for each processor. Intel emphasizes integration directly into established AI frameworks, model-serving software and deployment environments. Its summit presentation describes three paths for making that mixed CPU-and-GPU approach usable:
Reuse across GPUs: D-series shares Intel’s Xe software foundation, which the company says supports application portability across its GPU platforms and reduces the work needed to deploy on new hardware.
Common development tools: Intel supports established AI frameworks, serving engines and development tools across CPUs and GPUs, alongside performance libraries and programmable software layers intended to improve inference throughput.
Agent orchestration: Intel’s AI for Enterprise Agent Toolkit is deployable on Xeon today. Its provider-based architecture is designed to extend to Intel GPUs, making that GPU path a planned extension rather than current toolkit availability.
The hardware standards work extends below the rack, too. Intel highlighted its contribution with industry partners to the Open Adapter Card workgroup, which is defining a standardized accelerator-card format within racks. The effort targets mechanical, electrical and management interoperability, giving system builders a more consistent way to integrate accelerators into different designs.
Sources
intel.comIntel Accelerates Open Infrastructure for the Agentic AI Era
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