Positron Raises $875 Million to Fund Its Next AI Inference Chip
The financing funds Positron’s move from deployed Atlas systems to a planned custom chip. Its central bet is that LPDDR5X memory can reduce dependence on scarce AI-chip components.
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The financing funds Positron’s move from deployed Atlas systems to a planned custom chip. Its central bet is that LPDDR5X memory can reduce dependence on scarce AI-chip components.
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Positron’s oversubscribed financing gives it capital to develop and industrialize Asimov, but the company remains years from a shipping product. The processor is scheduled for tapeout on TSMC’s N3P process in late 2026 and production in the second half of 2027. Positron is betting on LPDDR5X instead of HBM, while using the round to expand engineering infrastructure and ramp its existing Titan platform.
The round values Positron at $5 billion and was co-led by NEA, Atreides Management, Valor Equity Partners, Andra Capital, SemiAnalysis Capital, and Jim Clark.
Asimov’s planned memory capacity ranges from 288GB to 2,304GB per chip; Titan would combine four to eight chips.
Funding includes a more-than-2-megawatt engineering data center, an emulation platform, and Titan production, integration, and go-to-market work.
Positron has raised $875 million to carry its next AI inference chip from design toward manufacturing. The financing values the company at $5 billion and backs Asimov, a planned processor that sits at the center of Positron’s attempt to use more readily available memory for running AI models.
The round was co-led by NEA, Atreides Management, Valor Equity Partners, Andra Capital, SemiAnalysis Capital and Jim Clark. Liberty Global Tech Ventures also said it joined the oversubscribed financing as an investor.
Positron says the capital will fund Asimov’s tapeout, an engineering data center and emulation platform exceeding 2 megawatts, and Titan’s production ramp. Tapeout is when a chip design is sent for manufacturing; it is a major milestone, but it is not yet a production processor.
Positron’s approach is built around LPDDR5X memory rather than high-bandwidth memory, known as HBM, and CoWoS advanced packaging. The company says its systems can operate in air-cooled or liquid-cooled data centers, while its Atlas systems can be installed without cooling-system changes. Its stated bandwidth and deployment characteristics remain company claims.
The company says more than 50 racks of its first-generation Atlas system are being deployed at Oracle Cloud Infrastructure, with Parasail using that capacity for inference services. Positron also identifies Jump Trading and i3d.net as Atlas production customers. Those deployments give the company operating experience, but Asimov’s proposed specifications and schedule are still future targets.
Positron says Asimov will support 288GB to 2,304GB of memory per chip. Titan is planned to combine four to eight Asimov chips into one system. The new financing gives Positron resources to pursue that design; its next material test is meeting the stated tapeout schedule and turning the planned chip into production hardware.
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